A logic circuit is said to be “combinational” when no output is connected to an input, ie when the circuit is in open loop. Thus an output depends only on the state of the inputs.
Plan :
- Multiplexer circuits
- Demultiplexer and decoder circuits
- Encoder circuits
- Comparator circuits and equality detectors
1. Multiplexer circuits
These circuits have 1 output.
If they have n number of commands, then they will have 2 ^ n entries.
In our example we will take a multiplexer with 3 commands (A, B and C) which will therefore have 2 ^ 3 = 8 inputs (D0, D1, …, D7) and an output Y. This circuit is composed of a NOR (NOT OR), 8 AND and 8 INVERTERS:
Truth table:
| /G | C | B | A | Y | |
| 1 | X | X | X | 0 | |
| 0 | 0 | 0 | 0 | D0 | |
| 0 | 0 | 0 | 1 | D1 | |
| 0 | 0 | 1 | 0 | D2 | |
| 0 | 0 | 1 | 1 | D3 | |
| 0 | 1 | 0 | 0 | D4 | |
| 0 | 1 | 0 | 1 | D5 | |
| 0 | 1 | 1 | 0 | D6 | |
| 0 | 1 | 1 | 1 | D7 |
Operation:
- if / G = 1 then whatever the value of commands A, B and C (0 or 1) the output Y will be at 0
- if / G = 0 then the Y output will depend on the state of the 3 commands. If in our 3-bit command, C is the most significant bit (value 2 ^ 2 = 4 in base 10) and A the least significant bit (value 2 ^ 0 = 1 in base 10) then this is how Y varies:
- if CBA = 000 in base 2 => 0 in base 10, then output Y will take the value (0 or 1) of input D0.
- if CBA = 001 in base 2 => 1 in base 10, then output Y will take the value (0 or 1) of input D1.
- if CBA = 010 in base 2 => 2 in base 10, then output Y will take the value (0 or 1) of input D2.
… so on until: - if CBA = 111 in base 2 => 7 in base 10, then output Y will take the value (0 or 1) of input D7.
Conclusions :
The / G variable is in fact a command which validates the operation of the multiplexer: it must be at 0 for the circuit to operate as a multiplexer. It is the command which has the highest priority of the circuit (as long as it is not at 0, the multiplexer does not work!).
Once this command is 0, then the Y output depends on the value of CBA. Depending on this value, Y will take the state of one of inputs D0, …, D7.
A mulitplexor therefore allows the selection of the value of one input among several.
2. Demultiplexer and decoder circuits
1. Demultiplexers
These circuits have 1 entry.
If they have a number n of commands, then they will have 2 ^ n outputs.
In our example, we will take a demultiplexer with 2 commands (A and B) which will therefore have 2 ^ 2 = 4 outputs (Y0, Y1, Y2 and Y3) and a “data” input.
This circuit is composed of a NOR, 4 NAND and 4 INVERTERS:
Truth table:
| /Strobe | A | B | Y0 | Y1 | Y2 | Y3 | |
| 1 | X | X | 1 | 1 | 1 | 1 | |
| 0 | 0 | 0 | data | 1 | 1 | 1 | |
| 0 | 0 | 1 | 1 | data | 1 | 1 | |
| 0 | 1 | 0 | 1 | 1 | data | 1 | |
| 0 | 1 | 1 | 1 | 1 | 1 | data |
Operation:
- if / Strobe = 1 then whatever the states of A and B, all the outputs are at 1.
- if / Strobe = 0 then the outputs will depend on the status of commands A and B. If A is the most significant bit (value 2 ^ 1 = 2 in base 10) and B the least significant bit (value 2 ^ 0 = 1 in base 10), then the outputs vary as follows:
- if AB = 00 in base 2 => 0 in base 10, then output Y0 takes the value of “data” (0 or 1) and the other outputs are at 1.
- if AB = 01 in base 2 => 1 in base 10, then output Y1 takes the value of “data” (0 or 1) and the other outputs are at 1.
- if AB = 10 in base 2 => 2 in base 10, then output Y2 takes the value of “data” (0 or 1) and the other outputs are at 1.
- if AB = 11 in base 2 => 3 in base 10, then output Y3 takes the value of “data” (0 or 1) and the other outputs are at 1.
Conclusions :
The / Strobe variable is in fact a command which makes it possible to validate the operation of the circuit in demultiplexer. It has the highest priority because as long as it is not at 0, the circuit cannot operate as a demultiplexer!
Once this command is at 0, we realize that a demultiplexer circuit allows the state of an input (here “data”) to be transmitted to a single output among several.
2. Decoders
If a decoder circuit has a number n of commands, then it has 2 ^ n outputs.
In our case, we will take as an example a decoder with 3 commands (A, B and C) and therefore 2 ^ 3 = 8 outputs (Y0, Y1, …, Y7). This circuit is made up of 8 NANDs and 4 INVERTERS:
Truth table:
| /G | A | B | C | Y0 | Y1 | Y2 | Y3 | Y4 | Y5 | Y6 | Y7 | |
| 1 | X | X | X | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | |
| 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | |
| 0 | … | … | … | … | … | … | … | … | … | … | … | |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
Operation:
- if / G = 1 then whatever the state of the commands, all the outputs are at 1.
- if / G = 0 then the outputs will depend on the status of commands A, B and C. If A is the most significant bit (value 2 ^ 2 = 4 in base 10) and C the least significant bit ( value 2 ^ 1 in base 10) then the outputs vary as follows:
- if ABC = 000 in base 2 => 0 in base 10 then the output Y0 = 0 and all the others are at 1.
- if ABC = 001 in base 2 => 1 in base 10 then the output Y1 = 0 and all the others are at 1.
- if ABC = 010 in base 2 => 2 in base 10 then output Y2 = 0 and all the others are at 1.
… - if ABC = 111 in base 2 => 7 in base 10 then the output Y7 = 0 and all the others are at 1.
Conclusions :
The / G variable is in fact a command which validates the operation of the circuit as a decoder. It has the highest priority because as long as it is not at 0, the circuit cannot function as a decoder!
3. Encoder circuits
If an encoder has n number of outputs, then it has 2 ^ n inputs.
In our example we will take an encoder with 3 outputs (Y2, Y1, Y0), i.e. with 2 ^ 3 = 8 inputs (e0, e1, e2 …, e7).
Note: Gs is also an outing, but it is not essential. We will see that Gs has a role of priority encoder …
This circuit has 12 ET, 2 NAND, 3 NOR and 12 INVERTERS:
Truth table:
| /G | e0 | e1 | e2 | e3 | e4 | e5 | e6 | e7 | Y2 | Y1 | Y0 | Gs | |
| 1 | X | X | X | X | X | X | X | X | 1 | 1 | 1 | 1 | |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| 0 | X | X | X | X | X | X | X | 0 | 0 | 0 | 0 | 0 | |
| 0 | X | X | X | X | X | X | 0 | 1 | 0 | 0 | 1 | 0 | |
| 0 | X | X | X | X | X | 0 | 1 | 1 | 0 | 1 | 0 | 0 | |
| 0 | X | X | X | X | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | |
| 0 | X | X | X | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | |
| 0 | X | X | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | |
| 0 | X | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
Operation:
Let us assume that at the output, Y2 is the most significant bit (value 2 ^ 2 = 4 in base 10) and that Y0 is the least significant bit (value 2 ^ 0 = 1 in base 10).
- if / G = 1: whatever the inputs, all the outputs are at 1.
- if / G = 0:
- if all the inputs are at 1 then all the outputs are at 1.
- if e7 = 0 (and regardless of the state of the other outputs) then all the outputs are at 0 (Y2Y1Y0 = 000 in base 2 => 0 = 7-7 in base 10).
- if e6 = 0 and e7 = 1 (and regardless of the state of the other outputs) then Y0 = 1 and the other outputs are at 0 (Y2Y1Y0 = 001 in base 2 => 1 = 7-6 in base 10).
- if e5 = 0 and the inputs greater than e5 to 1 then Y2Y1Y0 = 010 in base 2 => 2 = 7-5 in base 10)
… - in the general case: if eN = 0 and the inputs greater than eN at 1 then Y2Y1Y0 will be such that in base 10 it will be 7-N. This is the encoding performed by our encoder.
Note :
We can see that, when / G = 0, in the case where e0e1e2e3e4e5e6e7 = 1111111 and in the case where e0e1e2e3e4e5e6e7 = 0111111 then we have the same output Y2Y1Y0 = 111. So how to differentiate these 2 input states since they are same exit?
They are differentiated by the Gs bit. Indeed in the case where all the inputs are at 1 then Gs = 1 and in the other Gs = 0. This is what the output Gs is for. It is called a priority encoder: it makes it possible to differentiate between 2 identical input states.
Conclusions :
The / G variable is in fact a command which validates the operation of the circuit as an encoder. It has the highest priority because as long as it is not at 0, the circuit cannot function as an encoder!
The circuit studied may already seem a little complicated and yet the encoding that it performs is rather simple. There are much more complex encoders since there are much more twisted encodings!
4. Comparator circuits and equality detectors
These circuits make it possible to compare the values of 2 inputs. These entries can be written to one or more bits.
Let us take as an example the comparison of 2 bits “a” and “b”:
Operation:
- if a> b (<=> a = 1 and b = 0) then a_sup_b = 1 and eg = a_inf_b = 0.
- if a = b then eg = 1 and a_sup_b = a_inf_b = 0.
- if a a = 0 and b = 1) then a_inf_b = 1 and eg = a_sup_b = 0.
Note :
To compare 2 inputs written on several bits, the principle remains the same.
For example if we want to compare an entry A on 2 bits: a1a0 with an entry B: b1b0, we will first compare the most significant bits a1 and b1:
- if a1 = 1 and b1 = 0 then we immediately deduce that A> B without comparing a0 and b0.
- if a1 = 0 and b1 = 1 then we immediately deduce that A <B without comparing a0 and b0.
- if a1 = b1 then it is necessary to compare a0 and b0 in the same way before being able to draw a conclusion.
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